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FPGA-based implementation of two-step schedulers for modular optical interconnection networks
Justine Cris Borromeo
, Isabella Cerutti
, Piero Castoldi
,
Rosula Reyes
, Nicola Andriolli
Department of Electronics, Computer, and Communications Engineering
Scuola Superiore sant'Anna
Information Engineering and Telecommunications (CNR-IEIIT)
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Computer Science
Field Programmable Gate Array
100%
Interconnection Network
100%
Longest Queue First
50%
Hardware Implementation
25%
Orbital Angular Momentum
25%
Hardware Performance
25%
Low Power Consumption
25%
Latency Penalty
25%
Scheduling Algorithm
25%
Speed-up
25%
High Throughput
25%
Execution Time
25%
Operating Frequency
25%
Engineering
Field Programmable Gate Array
100%
Optical Interconnection
100%
Limitations
25%
Orbital Angular Momentum
25%
Execution Time
25%
Operating Frequency
25%
Low Power Consumption
25%