@article{b839f5894edd4ad2abd4ec7fecafca8a,
title = "A novel low-power synchronous preamble data line chip design for oscillator control interface",
keywords = "CMOS digital integrated circuit, Communication protocols, Digital signal process, Electronic device measurement and very-large-scale integration (VLSI), Field-programmable gate array (FPGA), SPI",
author = "Chen, \{Shih Lun\} and Chi, \{Tsun Kuang\} and Tuan, \{Min Chun\} and Chen, \{Chiung An\} and Wang, \{Liang Hung\} and Chiang, \{Wei Yuan\} and Lin, \{Ming Yi\} and Abu, \{Patricia Angela R.\}",
note = "Publisher Copyright: {\textcopyright} 2020 by the authors. Licensee MDPI, Basel, Switzerland.",
year = "2020",
month = sep,
doi = "10.3390/electronics9091509",
language = "English",
volume = "9",
pages = "1--16",
journal = "Electronics (Switzerland)",
issn = "2079-9292",
publisher = "Multidisciplinary Digital Publishing Institute (MDPI)",
number = "9",
}